Energy-optimal caches with guaranteed lifetime
Jul 30, 2012
DOI: 10.1145/2333660.233369
Published in: 2012 ACM/IEEE international symposium on Low power electronics and design
Publisher: ACM
Mirko Loghi
Haroon Mahmood
Andrea Calimera
Massimo Poncino
Enrico Macii
This work addresses the aging of the memory sub-system due to NBTI (Negative Bias Temperature Instability) in systems that have to provide a guaranteed level of service, and specifically, a guaranteed lifetime. Our approach leverages a novel cache architecture in which a smart joint use of redundancy and power management allows us to obtain caches that meet a desired lifetime target with minimal energy consumption. This is made possible by exploiting the possibility of putting the cache sub-block used for redundancy into a deep low-power state, thus allowing more energy saving than a regular architecture. Sacrificing a portion of the cache for aging mitigation only marginally affects performance thanks to the non-linear dependency of miss rate versus cache size, which allows to find the best cache size that maximizes the objective. Simulation results show that it is possible to meet the target lifetime by achieving energy reductions (measured over the lifetime of the system) ranging from 3X to 10X (2X to 8X) for a lifetime target of 15 (25) years, with marginal miss rate overhead.